VLSI design of the tiny RISC microprocessor

This report describes the Tiny RISC microprocessor designed at UC Irvine. Tiny RISC is a 16-bit microprocessor and has a RISC-style architecture. The chip was fabricated by MOSIS [1] in a 2μm n-well CMOS technology. The processor has a cycle time of 70 ns

Architectural design and analysis of a VLIW processor

Architectural design and analysis of VIPER, a VLIW processor designed to take advantage of instruction level parallelism, are presented. VIPER is designed to take advantage of the parallelizing capabilities of Percolation Scheduling. The approach taken in the design of VIPER addresses design issues involving implementation constraints, organizational techniques, and code generation strategies. The hardware organization of VIPER is determined by analyzing the efficiency of various organizational strategies. The relationships that exist among the pipeline structure, the memory addressing mode, the bypassing hardware, and the processor cycle time are studied. VIPER has been designed to provide support for multiway branching and conditional execution of operations. An integral objective of the design was to develop the code generator for the target machine. The code generator utilizes a new code scheduling technique that is devised to reduce the frequency of pipeline stalls caused by data hazards

Reconfigurable Processors for High-Performance, Embedded Digital Signal Processing

For high-performance, embedded digital signal processing, digital signal processors (DSPs) are very important. Further, they have many features which make their integration with on-chip reconfigurable logic (RL) resources feasible and beneficial. In this paper, we discuss how this integration might be done and the potential area costs and performance benefits of incorporating RL onto a DSP chip. For our proposed architecture, a reconfigurable coprocessor can provide speed-ups ranging from 2-32x with an area cost of about a second DSP core for a set of signal processing applications and kernels

VIPER : a 25-MHz, 100-MIPS peak VLIW micro-processor

This paper describes the design and implementation of a very long instruction word (VLIW) microprocessor. The VIPER (VLIW integer processor) contains four pipelined functional units, and can achieve 100 MIPS peak performance at 25 MHz. The procesor is capable of performing multiway branch operations, two load/store operations and up to four ALU operations in each clock cycle, with full register file access to each functional unit. VIPER is the first VLIW microprocessor known that can achieve this level of performance. Designed in twelve months, the processor is integrated with an instruction cache controller and a data cache, requiring 450,000 transistors and a die size of 12.9 by 9.1 mm in a 1.2 µm technology

Suppression of MAPKAPK2 during mammalian hibernation

Metabolic signaling coordinates the transition by hibernating mammals from euthermia into profound torpor. Organ-specific responses by activated p38 mitogen activated protein kinase (MAPK) are known to contribute to this transition. Therefore, we hypothesized that the MAPK-activated protein kinase-2 (MAPKAPK2), a downstream target of p38 MAPK, would also be active in establishing the torpid state. Kinetic parameters of MAPKAPK2 from skeletal muscle of Richardson's ground squirrels, Spermophilus richardsonii, were analyzed using a fluorescence assay. MAPKAPK2 activity was 27.4±1.27pmol/min/mg in muscle from euthermic squirrels and decreased by ∼63% during cold torpor, while total protein levels were unchanged (as assessed by immunoblotting). In vitro treatment of MAPKAPK2 via stimulation of endogenous phosphatases and addition of commercial alkaline phosphatase decreased enzyme activity to only ∼3-5% of its original value in muscle extracts from both euthermic and hibernating squirrels suggesting that posttranslational modification suppresses MAPKAPK2 during the transition from euthermic to torpid states. Enzyme S0.5 and nH values for ATP and peptide substrates changed significantly between euthermia and torpor, and also between assays at 22 versus 10°C but, kinetic parameters were actually closely conserved when values for the euthermic enzyme at 22°C were directly compared with the hibernator enzyme at 10°C. Arrhenius plots showed significantly different activation energies of 40.8±0.7 and 54.3±2.7kJ/mol for the muscle enzyme from euthermic versus torpid animals, respectively but MAPKAPK2 from the two physiological states showed no difference in sensitivity to urea denaturation. Overall, the results show that total activity of MAPKAPK2 is in fact reduced, despite previous findings of p38 MAPK activation, and kinetic parameters are altered when ground squirrels enter torpor but protein stability is not apparently changed. The data suggest that MAPKAPK2 suppression may have a significant role in the differential regulation of muscle target proteins when ground squirrels enter torpor